LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY mux81 ISPORT(A0,A1,A2,EN : IN STD_LOGIC; D : IN STD_LOGIC_VECTOR(7 DOWNTO 0); Y : OUT STD_LOGIC);END ENTITY mux81;ARCHITECTURE MUX1 OF mux81 ISSIGNAL sel: STD_LOGIC_VECTOR(2 DOWNTO 0);BEGINsel=A0&A1&A2;PROCESS(A0,A1,A2,sel,EN,D(0),D(1),D(2),D(3),D(4),D(5),D(6) BEGIN IF EN=1 THEN Y Y Y Y Y Y Y Y Y =X; END CASE; END IF; END PROCESS; END MUX1;