SoC设计方法与实现设计方法与实现郭炜郭炜 郭筝郭筝 谢憬谢憬弹厕裤哪真耿阮畜与埃酵洒平涎谊耘痰益铅来赔啪卸歼故欣嵌尺怒厂轧暖SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计第十四章第十四章I/O设计及封装设计及封装（二）（二）疡慌枝活侩密占蠢篆浩子邢闯匪掷徽镀名狰吮饵针吞透拌酬态泛察洪茵姚SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计 OutlinesBasic structure of I/O cellsNoise Cancellation ESD Protection SchemeI/O ring designPackage Selection销渔跳矢恼叶返顶乞厂惹油步椭宇权身养货浆咋狂献序汗迸房阅睬是藩锯SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Package FunctionsSignal distributionPower distributionHeat dissipationCircuit support and protection from environmentA space transformer between the fine pitch grid of IC and the PCB (Printed Circuit Board) pitch grid唁量贵化详忌帝鹅捐唬渭头永枉穗西枢闪茹臀凯诡斩氏住莹辜芬撞刘德漫SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计SingulationMoldingSolder Ball AttachPackaging ProcessSawingWire BondingDieDie AttachWaferWireSubstratePackingFinal TestSolder BallMolding Compound贞敲痉芜披嫡埃宋捏慧隙涌酝殷棍诊蒜浴兹茫哪曳仿兢滩跃墟凿雍迈爵邻SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Typical IC PackageBall Grid Array (BGA)Small Outline PackageDual-In-Line PackagePlastic Pin Grid ArrayPlastic Quad Flat PackageChip Scale Package (CSP)System In Package (SIP)Plastic Leaded Chip CarrierThin Outline Package凹揖粹莽亢辞哭嫡达钉佰柄铣村字授辗铬忙寓田找认蕉吊嫌推瞧乎镊氰酬SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Industry Packing Trends刃庐炼拨援讲诵浇殷迁蝎釉身韶拧六委垣安削彦韶踩惕拼层二窒萨嫩翘啮SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Ball Grid Array (BGA) BGA is a die-up design, plastic over-molded BGA using 2-4 layer BT substrate膛劣欠秽赤龚媒玫呆崩真翔啡茅税矫稿舆庄犊张认昔熬粱拟帘蛀揉桨筒左SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计More Advantage of BGAImproved electrical performance due to shorter distance between the chip and the solder ballsImproved thermal performance by use of thermal vias, or heat dissipation through power and ground plane incorporated in the substrateReduced handling-related lead damages due to use of solder balls instead of metal leadsWhen reflow attached to boards, the solder balls self align leading to higher manufacturing yields津诣理国蹄勒醇敖辣势受榨西簿小擎库刁惫盂闭揍纹芽圣沃咆恒枕淄西点SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Flip Chip PackagesPros Good electrical performance(reduced inductance) Good thermal performance w/heat sink Large number of die pads per die areaSmall die size and low package heightCons High cost solution Board level reliability concernsDirectsolderbumpingontothedie,placingtheinterconnectionbumpdirectlyontothesubstrate,eliminatingtheneedforwirebonding.SUBSTRATE(Organic or Ceramic)CHIPSolder bumpSolder ball颠渡惮寒唬京蚀幻叉砷耿疙潦盏号椰梁泉谷吩羡恍贡插跑立幻芦侣邹顶郁SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Si WaferSolderUBMPassivationWafer Scale CSP抖誓缺缔譬棕豌枪康塑竹咬形审牢挎团健倪绰瞄虏狂胯捂见靖战控乾鸥恭SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Multi Chip Package (MCP)It also called SiP (System in Package)High performance nLow noisenLow power consumptionnOptimizing board space Commonly used in handheld applicationProblem: reduced assembly yield, high testing cast谈恿咀湾晨党窟所大脆啡疚楼慎场逊拍颅郑莱自谣村糟榆稗嫡咏优咏疹嫂SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Package DriversElectricalThermalMechanicalCostPackageBodySizeI/OCountDieSizeReliabilityPackageSelectionProcess氏疏习矢泪惜最炒楞讫盏跨硕烂舅昂诅婆叁务闽泉愧槛瓤少邀了戴苍徒狱SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Thermal EffectPower consumption generates heat and raises temperatureCircuit performance degrades due to slower MOSFET switching speed in high temperatureMore susceptible to reliability problems in higher temperaturenOxide breakdownnHot-electron effectnHigher leakage current捌翁组份膘绍谗晦硕这遭嗣毛救猴舰矢性鲁谋蟹鄙烧娄噪各灵晨糖醉羚砍SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Thermal Performance and ImprovementlAdding thermal pads to improve thermal performancelA typical Power BGA (PBGA) Structure:Thermal simulationThermal BallsPBGA has thermal path through thermal via and ball恃吵尖侨浙茫群结孕违腥立精衡缘床败馏袁撒投尸虑佯婆煞棚陡敞殉馏娩SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Packaging General GuidelinesPackages affect both power supply delivery and signal integrityWirebond packagesnAlways use package with a ground planenNever use for high power designs (too much IR drop, noise)nNever use above 4GbpsFlip Chip packagesnAlways use for 4+GbpsnAlways use for high power systemsnCan be the best power, best performancenMore knowledge needed to buildnCan be built poorly 墙包烟坞玉甲尉批喝涤企刹虏橡磺民往疟框矮锐结抛拈鹏铡嘻躲暑幂树奈SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计3C Package Evolution克异蚊破溃凿披术刷寂锰撮项闹韭零津绩外鞍接清彩垛焚洲痊蚌建谤瑶宝SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Package Technology TrendsReduction in Area, Volume and Weight Increased I/O Count Improved Thermal / Electrical Performance Improved Reliability Potential for Multi-Chip Package, System In Package Reduced Capital Cost for Assembly and Test Green Products (Pb-Free, Halogen-Free)悯盛刚吱闽速趴垮调八装袋冒鹤氮贡贞诺掺美树抖蛹卧隘叮喜晨镶磨计漳SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计ConclusionslThere is no one package for all applicationslFlip Chip provides the best electrical performancelPBGA provides the best thermal performancelLeaded packages provide the best board level reliability performancelThe right package is the one that can meet all the requirements and constraints of the application for the least cost谴具芍二爱铲夷搪暑胯筷车移洼甩剂挠叼残壁咙赏拨秉巨唬群熟串懈蜒见SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计SoC设计方法与实现设计方法与实现郭炜郭炜 郭筝郭筝 谢憬谢憬弹厕裤哪真耿阮畜与埃酵洒平涎谊耘痰益铅来赔啪卸歼故欣嵌尺怒厂轧暖SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计Thank you镊乱携捆俩骸取无满恋貉绚复原树冀大活壮硫荆桔颖丧辟荐垒旋成假购垦SoC设计方法与实现第十四章IO环设计SoC设计方法与实现第十四章IO环设计